Integrated circuits that include Content-Addressable Memories (CAMs) are well known in the art. CAM circuitry compare input search data against data stored in CAM arrays and identify whether or not the input data matches the data stored in one or more of the memory arrays.
In one type of application, CAMs are used in connection with processor schedulers that schedule the execution of processor instructions/operations. Schedulers are known that use wakeup logic to trace instruction dependence and wakes instructions up when their source operands become available. Wakeup logic can be implemented by using CAMs that fully match all the source tags in an issue window with result tags.
Relatively high power consumption by CAMs can become problematic and can lead to overheating concerns as well as battery life concerns for battery operated devices. As reported by K. S. Hsiao and C. H. Chen, “Improving Scalability and Complexity of Dynamic Scheduler through Wakeup-Based Scheduling,” Proc. Int'l Conf. Computer Design, October 2006, “As for the power consideration, the power consumption associated with the CAM-based scheduler constitutes a significant portion of the processor power consumption and may lead to costly cooling system. For example, the issue logic is the most power hungry component of the Compaq Alpha 21464 processor; it is responsible for 46% of the total processor power. Similarly, the out-of-order scheduler of the Intel Pentium 4 processor accounts for 40% of the total power consumption. The wakeup logic dominates the most power consumption of the dynamic scheduler.”